An anti-fuse is an electronic device that is electrically non-conductive in its initial unprogrammed state and becomes electrically conductive when programmed. Programming of an anti-fuse is an irreversible process, i.e., once programmed, it remains in the conductive state and cannot be made to return to the non-conductive state. Silicon dioxide (SiO2), gate dielectric used in metal-oxide-semiconductor field-effect transistors (MOSFET's), is one example of an anti-fuse material used in complementary MOS (CMOS) process, a mainstream manufacturing technology in semiconductor industry. When subjected to a high voltage, dielectric breakdown occurs in SiO2 and a permanent current conduction path is formed through it. Those with ordinary skill in the art will recognize that other dielectric material, for example, nitrided silicon oxide (SiON) and high-k dielectric such as hafnium dioxide (HfO2), can be used as anti-fuse.
Anti-fuse retains its electronic state, conductive or non-conductive, even after the power is turned off so it can be used as non-volatile memory. In contrast to other non-volatile memories such as erasable programmable read-only memory (EPROM), electrically-erasable programmable read-only memory (EEPROM) and flash memory that can be programmed and erased multiple times, an anti-fuse memory can be programmed only once, i.e., it is an one-time-programmable (OTP) memory. OTP memory is used in applications such as storing program code, security code and trimming of analog data. OTP memory may be a stand-alone product or embedded into other semiconductor chips, such as system-on-a-chip (SoC) where OTP memory functions as a data storage block.
System-on-a-chips are widely used in consumer, industrial and automotive electronics, and internet-of-things (IoT). For these applications, embedded OTP memory of high-performance and high-density with low cost is desired. OTP memory with crosspoint architecture, where each bit cell is defined at the intersection of a word line and a bit line, offers a small bit cell size and is capable of delivering high density memory at a low cost. To be cost-effective, it is desirable that OTP memory is fully compatible with the manufacturing process of the main chip that it is embedded into. An exemplary crosspoint anti-fuse OTP memory is shown in FIG. 1, a prior art found in U.S. Pat. No. 8,330,189 (FIG. 8 therein). It should be noted in FIG. 1 that the high bit-line series resistance caused by the buried bit-line structure may compromise program and read performance. Furthermore, the OTP memory in FIG. 1 requires extra wafer processing steps. It is therefore desired to provide an embedded anti-fuse OTP memory that offers high performance, high density and reliability that is fully compatible with standard wafer manufacturing processes.